The present invention is generally directed to a system and method for automatic reconfiguration of a chain of interconnected devices within an electronic circuit design. More specifically, a system and method are provided for user-friendly insertion of at least one device, and optionally a chain (or chains) of devices, into a pre-existing chain (or chains) of interconnected devices within a graphical representation of a circuit design such as a circuit layout, circuit mask, circuit schematic, or the like within an electronic design automation (EDA) tool in rule-compliant manner.
Presently, a given circuit design may incorporate upwards of tens of billions of transistors or more. Moore's law has established a timeline of a doubling of transistors in a given Integrated Circuit (IC) product-line every 18 months. As circuit complexity and transistor counts continue to exponentially grow, circuit design becomes much more challenging and demanding. For circuit designers to successfully insert, modify, interconnect, and remove devices such as transistors into complex functional structures such as logic arrays, chains, and the like to fit within a circuit design, design teams have to expend substantial time and effort.
Further exacerbating such operations is the fact that many devices in these structures are arranged in abutted relation with each other. By abutment, space-saving and wire-routing savings measure are realized in circuit designs whereby two or more devices share common portions rather than each having their own dedicated functional portions. For example, two (or several) devices such as transistors may be integrally formed into a chain or other structure where a plurality of devices may all share a common drain or source portion or the like. In chains of greater numbers of devices, identification of individual devices may be difficult as portions may be communally shared on multiple sides with other devices. Moreover, distinguishing portions which normally delineate devices, such as metal contacts, may be omitted. A simplified illustration of an abutted chain of devices 300 may be seen in FIG. 3.
When a change is made to a circuit design, there is a risk of a designer inadvertently introducing mistakes—the remedy for which may require additional unnecessary design flow iterations from design to verification and back. In a system with great numbers of transistors arranged in intricate and integral functional structures, even a minor mistake may have significant adverse impact on the operation of the given circuit. Worse yet, if the mistake is not detected and properly remedied by verification systems, a defective integrated circuit product may be fabricated.
Conversely, even incremental savings in circuit design tasks aggregated throughout the industry may save substantial time and money and result in better integrated circuit (IC) products. When the measures for more efficiently performing such tasks also reduce the likelihood of errors, the savings may be substantial.
In systems heretofore known for circuit design, where a pre-established chain of interconnected devices in a circuit design requires the intermediate insertion of another device or chain, a designer must perform a number of time-consuming and error-prone operations beginning with manually initiating deconstruction of the devices from the chain. This is all the more difficult in a chain of mutually abutted devices with neighboring devices sharing overlapping portions. Modifying an abutted pre-existing chain includes actuating a processor and effecting a memory-intensive abutment removal procedure whereby devices are un-abutted one from the other and their individual functional portions are each re-created. Space must then be allocated within the series of un-abutted devices by shifting a portion thereof, moving the new device into the allocated space, and transforming one or more devices such as by reorienting, reordering, or permuting to allow for compatible interface and re-abutment in compliance with both structural and operational requirements of the circuit design (permute operations generally involve the swapping of source and drain portions on a single device). Only once transformed could the chain then be reconstructed in abutted relation to incorporate the new device/s. The chain of devices would then need to be re-routed into the circuit design to interconnect with other devices, power, ground, and signal sources and outputs. Any errors or mistakes introduced would then need to be remedied in an iterative redesign, simulation, and re-verification loop. Such approach is not efficient and unduly prone to error.
There is therefore a need for a system and method for automatic reconfiguration of a chain of devices within a circuit design tool.
There is therefore a need for a system and method by which a circuit designer may insert a device (or chains of devices) into a chain (or chains) of devices within a circuit design tool in automated and efficient manner while avoiding the introduction of structural and operational violations.